Embedded Software Design and Verification Engineer

Katalyst Healthcares & Life Sciences

DOORS, Git, Matissa, MS Visio, AMD Vitis, ARM C Compiler, Lauterbach Trace32. Protocols - Ethernet, SPI, RS485, CAN, I2C, Pre-SOI Audit Experience.

Location

PLANO, TX

Roles & Responsibilities:

Software Development Lifecycle (SDLC) per DO-178C DAL A Safety Critical Standards
Software Requirement Capture & Analysis
Software Architecture & Design
Traceability
Updating Source Code to DO-178C
SDLC Reviews
DAL Level A Software Development Lifecycle Documentation
Protocols - Ethernet, SPI, RS485, CAN, I2C, Pre-SOI Audit Experience
Design Analysis & Report Preparation, Resolving issues
DOORS, Git, Matissa, MS Visio, AMD Vitis, ARM C Compiler, Lauterbach Trace32
Test Scripting and Test Procedures
Technical knowledge related to FPGA verification and debugging
Excellent hardware and software debugging skills

Experience: