The DFT Engineer develops and implements Design-for-Test methodologies for semiconductor integrated circuits to improve testability, manufacturing yield, and product quality. Responsibilities include scan insertion, ATPG pattern generation, memory BIST, boundary scan, DFT verification, and collaboration with RTL design, physical design, and silicon validation teams to ensure test coverage and manufacturing readiness.
- 5+ years of hands-on experience in Design for Test (DFT) and Automatic Test Pattern Generation (ATPG) for SoC or ASIC designs.
- Strong understanding of DFT fundamentals, including controllability, observability, and scan-based testing.
- Proven expertise in ATPG pattern generation, analysis, and debugging.
- Experience with MBIST, including memory test architectures and diagnostics.
- Knowledge of I/O test methodologies for interface-level and pin-level validation.
- Solid understanding of clock DFT and clock verification concepts.
- Strong knowledge of digital design and RTL fundamentals.
- Experience with industry-standard DFT/ATPG EDA tools.
- Ability to work effectively in fast-paced, high-performance semiconductor programs.
- Strong analytical, problem-solving, and communication skills
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, VLSI Design, or a related field.
- Develop and implement Design-for-Test (DFT) architectures for semiconductor designs.
- Perform scan insertion, scan-chain configuration, and DFT logic integration.
- Generate and validate Automatic Test Pattern Generation (ATPG) patterns.
- Implement and verify Memory Built-In Self-Test (MBIST) and Logic Built-In Self-Test (LBIST).
- Conduct DFT rule checks and resolve design-for-test violations.
- Analyze fault coverage, test coverage, and test pattern quality.
- Collaborate with RTL design, physical design, verification, and silicon validation teams.
- Debug DFT-related issues and optimize testability and manufacturing test efficiency.
- Support timing analysis, design constraints, and physical design integration.
- Develop and maintain DFT specifications, test procedures, and technical documentation.
- Support silicon bring-up, production testing, and manufacturing test readiness.
- Use EDA tools such as Synopsys or Siemens EDA for DFT implementation and verification.