ASIC Verification Engineer, Ring/Blink ASIC Team

Join the team that delivers highly differentiated silicon powering Blink and Ring battery-powered devices. Our verification team operates on state-of-the-art SoCs within a vertically integrated environment, contributing to early architectural and micro-architectural trade-offs that reduce time-to-revenue by compressing the DV cycle. In this role you will use bit-accurate C reference models as golden baselines to verify image and video processing subsystems, build and maintain UVM-based testbench environments with automated stimulus generation and scoreboarding, and drive gate-level simulations to ensure timing-accurate, power-aware signoff. Our integrated verification and validation flow spans architectural modeling through post-silicon bring-up - giving engineers end-to-end visibility into the designs they verify. The team works backwards from customer requirements to deliver ultra-low-power, energy-efficient products incorporating the latest in AI, video processing, low-power communications, and advanced CMOS fabrication technology.

Key job responsibilities

• Use and/or build bit accurate C models
• Evaluate block and sub-systems for testability/verifiability
• Write and execute comprehensive block and system level testplans
• Build assertions, traffic generators and scoreboards
• Build and assess RTL coverage metrics
• Bachelors degree in Electrical Engineering or a related field
• Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills
• Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing