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TPU SoC Design Engineer, Cloud

Google

Sunnyvale, CA

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JOB DETAILS
JOB TYPE
Full-time, Employee
SKILLS
ASIC (Application Specific Integrated Circuit), ASIC Design, Analysis Skills, Artificial Intelligence (AI), Centers for Disease Control and Prevention (CDC), Cloud Computing, Computer Architecture, Computer Engineering, Computer Firmware, Computer Science, Construction Industry Software, Cross-Functional, Debugging Skills, Design Flows, Design Verification, Digital Circuit Design, Documentation, Electrical Engineering, Equal Employment Opportunity (EEO), Graphic Design, Industry Standards, Network Operations Center, Operations Research, Perl Programming Language, Problem Solving Skills, Python Programming/Scripting Language, RTL Design, Scripting (Scripting Languages), Simulation, System-on-a-Chip (SoC), SystemVerilog, Tcl-Tk, Team Player, Technical/Engineering Design, Test Plan/Schedule, Testing, Validation Testing
LOCATION
Sunnyvale, CA
POSTED
30+ days ago

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 2 years of experience architecting RTL solutions employing software based construction, instantiation, customization or generation of RTL.
  • Experience with industry-standard EDA tools for simulation, synthesis, and power analysis.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience with scripting languages (i.e. Tcl, Python or Perl).
  • Experience architecting RTL solutions employing software based construction, instantiation, customization and generation of RTL.
  • Experience with SOC implementation standards and interfaces (i.e. AXI).
  • Experience with CDC, RDC, RTL Linting and LEC.
  • Understanding of digital design fundamentals, including synchronous and asynchronous logic, state machines, and bus protocols.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will join a team working on SoC-level RTL design for data center accelerators. You will work on top-level RTL, architecture, design and implementation of global communication busses, and integration of complex ASIC designs, as this is a highly cross-functional and central role that will require interactions with numerous ASIC development teams. You will own deliverables to the cross-functional teams (i.e. Physical Design, Verification, Validation, Firmware...) at various project milestones. You will also be directly involved in defining and creating methodologies that enable a highly efficient design environment for all ASIC engineers.

As a Soc Design Engineer on the TPU team, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design, computer architecture, and RTL coding to create innovative and efficient hardware solutions. This position offers the opportunity to address challenging technical problems at the forefront of AI hardware, working in a dynamic and collaborative environment.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving channel behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $138000 - $198000 (USD) + 15% bonus target + bonus + equity + benefitsLearn more about benefits at Google.

Responsibilities

  • Define and document the microarchitecture for digital designs within the TPU.
  • Develop high-quality, performant, and power-efficient Register Transfer Level (RTL) code, primarily in SystemVerilog.
  • Partner with the Verification team to develop test plans, debug RTL, and ensure functional correctness.
  • Work closely with the Physical Design team to meet timing, area, power, and manufacturability requirements.
  • Contribute to the development and enhancement of design tools, flows, and methodologies.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

About the Company

G

Google

Build for everyone

Since our founding in 1998, Google has grown by leaps and bounds. Starting from two computer science students in a university dorm room, we now have thousands of employees and offices around the world. These Googlers build products that help create opportunities for everyone, whether down the street or across the globe.

It starts with how we work together. We’re building a company where people of different views, backgrounds and experiences can do their best work and show up for one another. A place where every Googler feels like they belong.

So whether you develop new technology or creative campaigns, craft beautiful products or breakthrough partnerships, your work here is a chance to accomplish things that matter. Bring your insight, imagination, and healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.

Benefits

We strive to provide Googlers and their loved ones with a world-class benefits experience, focused on supporting their physical, financial, and emotional wellbeing. Our benefits are based on data, and centered around our users: Googlers and their families. They’re thoughtfully designed to enhance your health and wellbeing, and generous enough to make it easy for you to take good care of yourself (now, and in the future). So we can build for everyone, together.

Learn more about Google’s benefits on this site featuring Googlers’ experience.

How we Hire

Google’s hiring process is an important part of our culture. Googlers care deeply about their teams and the people who make them up. In order to  build for everyone, we know that we need a wide range of perspectives and experiences, and a fair hiring process is the first step in getting there.

Learn more about our hiring process.

COMPANY SIZE
10,000 employees or more
INDUSTRY
Computer Software
EMPLOYEE BENEFITS
Paid Sick Days, Performance Bonus, Professional Development, 401K, Stock Options, Employee Events, Retirement / Pension Plans, Tuition Reimbursement, Work From Home, Life Insurance, On Site Cafeteria
FOUNDED
1998
WEBSITE
https://goo.gle/4dbno6V