System Design Engineer (Multiple Positions)

Overview

Own the system-level specifications and perform the critical modeling and link-budget analysis necessary to ensure seamless end-to-end data integrity. Bridge the gap between high-speed ASICs and complex transmission channels. Join a highly technical, fast‑paced team pushing the limits of high‑frequency performance.

Responsibilities

Translate top-level system requirements into detailed specifications for baseband blocks and RF/high-speed transmission channels.

Develop comprehensive end-to-end system models in MATLAB/Simulink to simulate link performance, accounting for noise, non-linearity, and frequency-dependent losses.

Conduct link-budget analysis to determine gain, noise figure, and power requirements across the entire signal chain.

Act as the central integration point for sub-block designs. You will ingest circuit-level data from ASIC and Channel designers to verify that integrated block-level performance meets the overall system-level targets.

Evaluate and define the optimal balance between analog/RF front-end performance and digital equalization strategies (e.g., FFE/DFE/MLSE).

Qualifications

Ph.D. in Electrical Engineering, or M.S. with 3+ years of relevant industry experience.

Expert-level capability in MATLAB for modeling physical layer impairments and performing statistical link analysis.

Strong familiarity with the operating principles of RF blocks (Mixers, Amplifiers), Analog Front-Ends (CTLE, VGA), and Digital Equalization techniques (FFE, DFE, MLSE).

A proven ability to look at a high-speed signal path and identify where architectural trade-offs (e.g., power vs. performance) should be made to meet rigorous system specs.

Strong teamwork, communication, and multitasking skills in a fast‑moving environment.

Location(s)

Silicon Valley, CA (San Jose metro area)

Irvine, CA (Orange County area)