Sr. RTL Designer

Sr. RTL Engineer

We are seeking a Sr. RTL Engineer with 10+ years of experience in digital design to play a key role in the development of next-generation high-performance SoCs. In this position, you will collaborate closely with architecture, verification, software, performance modeling, and physical design teams to translate complex architectural requirements into robust and efficient RTL implementations. You will be responsible for owning major design blocks from microarchitecture definition through RTL development, verification support, synthesis, and silicon bring-up. The ideal candidate is a hands-on engineer with deep expertise in RTL design, a strong understanding of modern SoC architectures, and a proven track record of delivering complex silicon products to production.

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Responsibilities

• Define microarchitectures and develop high-quality RTL for complex digital subsystems and SoC components.
• Collaborate with architects to evaluate design tradeoffs related to performance, power, area, and scalability.
• Work closely with verification teams to develop validation strategies, debug design issues, and achieve coverage goals.
• Partner with physical design teams to ensure RTL is optimized for timing closure, power efficiency, and implementation.
• Review and analyze specifications, performance models, and system requirements to drive design decisions.
• Support synthesis, STA, CDC, lint, DFT, and silicon bring-up activities.
• Debug and resolve functional, performance, and integration issues throughout the development cycle.
• Mentor junior engineers and contribute to engineering best practices and design methodologies.
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Required Qualifications

• Bachelor"s, Master"s, or PhD in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of experience in RTL design and development for ASIC or SoC products.
• Strong expertise in Verilog and SystemVerilog.
• Deep understanding of digital design fundamentals, including pipelining, state machines, clocking, synchronization, memory systems, and high-performance design techniques.
• Experience developing complex microarchitectures and translating architectural specifications into RTL.
• Solid understanding of SoC integration, interconnects, and industry-standard protocols such as AXI, AHB, APB, PCIe, DDR, or similar.
• Experience working with synthesis, STA, CDC, lint, and power analysis tools.
• Proven track record of successfully taking designs from concept through silicon bring-up and production.
• Strong debugging, analytical, and problem-solving skills.
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Preferred Qualifications

• Experience with AI/ML accelerators, CPUs, GPUs, DSPs, networking, or high-performance compute architectures.
• Familiarity with performance modeling and architecture exploration.
• Experience with low-power design techniques and power optimization methodologies.
• Knowledge of DFT concepts and silicon validation.
• Experience mentoring engineers and leading substantial design efforts across multiple teams.
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Use the following link to speak with a recruiter and learn more: click here

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Job Type & Location

This is a Permanent position based out of Santa Clara, CA.

Pay and Benefits

The pay range for this position is $250000.00 - $300000.00/yr.

Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this role may include the following: • Medical, dental & vision • Critical Illness, Accident, and Hospital • 401(k) Retirement Plan - Pre-tax and Roth post-tax contributions available • Life Insurance (Voluntary Life & AD&D for the employee and dependents) • Short and long-term disability • Health Spending Account (HSA) • Transportation benefits • Employee Assistance Program • Time Off/Leave (PTO, Vacation or Sick Leave)

Workplace Type

This is a fully onsite position in Santa Clara,CA.

Application Deadline

This position is anticipated to close on Aug 6, 2026.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.

If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email actalentaccommodation@actalentservices.com for other accommodation options.

San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.

Massachusetts Lie Detector: It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

Use of Artificial Intelligence (AI): We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.