SoC Design Verification Engineer | UVM & Power Debug
Avanciers
Austin, TX
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JOB DETAILS
SALARY
$80,000–$160,000 Per Year
SKILLS
Compensation and Benefits, Consulting, Debugging Skills, Design Verification, System-on-a-Chip (SoC), Team Player, Technical/Engineering Design, Test Plan/Schedule, Testing, Verification Engineering
LOCATION
Austin, TX
POSTED
2 days ago
A technology consulting firm is seeking a Design Verification Engineer to join the team for a full-time project. The role involves understanding SV and UVM, building verification environments, and collaborating with various technical teams. Candidates should have solid debugging skills and the ability to develop test plans. Compensation ranges from $80,000 to $160,000, depending on experience and skills.#J-18808-Ljbffr