Senior DSP Software Engineer

Join the Team That's Redefining Wireless Technology

At Tarana, we're more than just a fast-growing tech company—we’re a team of bold innovators on a mission to revolutionize broadband. Our groundbreaking Fixed Wireless Access technology is delivering fiber-class internet speeds worldwide, bridging the digital divide in ways previously thought impossible.

As a Senior DSP Software Engineer, you will work on the design, development, integration, and testing of RF calibration software modules for a next-generation fixed wireless broadband system. The primary focus is on layer 1 functionality of the proprietary 5G protocol, such as channel estimation, IQ imbalance correction, and LO leakage cancellation.

Develop software for both the base station and user equipment of a broadband wireless access system, across various multicore DSP/ARM processors and real-time operating systems. Collaborate closely with L2/L3 software groups and FPGA/ASIC teams to deliver cross-layer features.  

What You’ll Do: 

• Design of Calibration software architecture, HW/SW interfaces, APIs, and RFIC impairments correction algorithms and protocol state machines
• Strong understanding of RFIC impairments and algorithms for compensating the impairments using Real-Time SW
• Hands-on implementation in C/C++ of DSP software modules running under RTOS on a multi-core DSP architecture
• System integration and debugging on complex hardware platforms
• Mentorship of junior engineers, providing technical guidance and code review
• Willing to learn continuously and collaborate with the team members. 

• MS or PhD in Electrical Engineering, with an emphasis in wireless communication and/or digital signal processing
• 5+ years of industry experience encompassing the ownership of design and implementation of signal processing algorithms on a DSP / ARM core running Linux or a RTOS
• Industry experience needed in RFIC software development for wireless communication systems (such as 5G, LTE, WiFi, or similar proprietary protocols)
• Strong understanding of RFIC impairments and compensating for the impairments using Real-Time SW
• Experience needed in system integration and bring-up

• Formal understanding of communication and signal processing theory and techniques, including OFDM communication systems, and a strong mathematical background in linear algebra
• Strong background in C, C++, and Python programming
• Experience with software development for multi-core embedded systems, including real-time operating systems (RTOS), memory and cycle optimization, caches, multi-threaded programming, inter-process communication, and HW/SW interaction
• Comprehensive knowledge of one or more algorithms used in wireless communication systems, and their associated design and software implementation. Relevant experience could be in areas such as:
  • RFIC impairments and compensations, SW development and validation
  • Calibration procedures for multi-antenna-based systems
  • Advanced array signal processing techniques, such as beam-forming and MIMO
  • Adaptive equalization, receiver synchronization, signal identification, and recovery
• Experience with version control systems (Git, Gerrit, Gitlab), and issue tracking and collaboration systems (Jira, Confluence)

About Us

Tarana’s mission is to accelerate the deployment of fast, affordable, and reliable internet access around the world. Through a decade of R&D and over $400M of investment, the Tarana team has created and continues to enhance a suite of next-generation fixed wireless access (ngFWA) technologies. Its unique ngFWA platform delivers game-changing advances in broadband economics in mainstream and underserved markets, using both licensed and unlicensed spectrum. Tarana’s ngFWA technology has been embraced by more than 300 service providers in 24 countries. Tarana is headquartered in Milpitas, California, with additional research and development in Pune, India. Learn more at www.taranawireless.com.

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