Apple Silicon GPU SW architecture team within the Media, Graphics & Compute Technologies group is seeking a senior/principal engineer to lead server-side ML acceleration and multi-node distribution initiatives. You will help define and shape our future GPU compute infrastructure on Private Cloud Compute that enables Apple Intelligence. In this role, youll be at the forefront of architecting and building our next-generation distributed ML infrastructure, where youll tackle the complex challenge of orchestrating massive network models across server clusters to power Apple Intelligence at unprecedented scale. It will involve designing sophisticated parallelization strategies that split models across many GPUs, optimizing every layer of the stack-from low-level memory access patterns to high-level distributed algorithms-to achieve maximum hardware utilization while minimizing latency for real-time user experiences. Youll work at the intersection of cutting-edge ML systems and hardware acceleration, collaborating directly with silicon architects to influence future GPU designs based on your deep understanding of inference workload characteristics, while simultaneously building the production systems that will serve billions of requests daily. This is a hands-on technical leadership position where youll not only architect these systems but also dive deep into performance profiling, implement novel optimization techniques, and solve unprecedented scaling challenges as you help define the future of AI experiences delivered through Apples secure cloud infrastructure. Responsibilities: Design and implement tensor/data/expert parallelism strategies for large language model inference across distributed server cluster environments. Drive hardware and software roadmap decisions for ML acceleration. Expert in designing architectures that achieves peak compute utilizations and optimal memory throughput. Develop and optimize distributed inference systems with focus on latency, throughput, and resource efficiency across multiple nodes. Architect scalable ML serving infrastructure supporting dynamic model sharding, load balancing, and fault tolerance. Collaborate with hardware teams on next-generation accelerator requirements and software teams on framework integration. Lead performance analysis and optimization of ML workloads, identifying bottlenecks in compute, memory, and network subsystems. Drive adoption of advanced parallelization techniques including pipeline parallelism, expert parallelism, and various other emerging approaches. Requirements: Strong knowledge of GPU programming (CUDA, ROCm) and high-performance computing. Must have excellent system programming skills in C/C++; Python is a plus. Deep understanding of distributed systems and parallel computing architectures. Experience with inter-node communication technologies (InfiniBand, RDMA, NCCL) in the context of ML training/inference. Understand how tensor frameworks (PyTorch, JAX, TensorFlow) are used in distributed training/inference. Technical BS/MS degree. Familiar with model development lifecycle from trained model to large scale production inference deployment. Proven track record in ML infrastructure at scale.
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