FPGA Verification Engineer

Tanisha Systems

Santa Clara, CA

JOB DETAILS
JOB TYPE
Contractor
SKILLS
Code Coverage, Communication Skills, Computer Engineering, Debugging Skills, Electrical Engineering, FPGA, FPGA Design, Functional Analysis, Functional Testing, Hardware Description Language, Identify Issues, Industry Standards, Perl Programming Language, Problem Solving Skills, Python Programming/Scripting Language, Scripting (Scripting Languages), SystemVerilog, Team Player, Technical/Engineering Design, Test Bench, Test Case, Test Plan/Schedule, VHDL Hardware Description Language, Verification Engineering, Verification Plans, Verilog Hardware Description Language
LOCATION
Santa Clara, CA
POSTED
30+ days ago
Job Title : FPGA Verification Engineer
Santa Clara, CA- 5 days onsite
Hire Type: Contract
Job Description:

We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall quality of our products.



Key Responsibilities:

• Develop and execute comprehensive verification plans for FPGA designs.


• Create and maintain test benches using industry-standard verification methodologies (e.g., UVM, SystemVerilog).


• Write and debug test cases to verify functionality, performance, and corner cases.


• Perform code coverage and functional coverage analysis.


• Identify and debug issues, working closely with design engineers to resolve them.


• Document verification results and provide clear and concise reports.


• Participate in design reviews and contribute to the overall verification strategy.


• Stay up-to-date with the latest verification methodologies and tools.



Skills Required:

• Strong understanding of FPGA design principles and architectures.


• Proficiency in SystemVerilog and UVM verification methodology.


• Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS).


• Knowledge of code coverage and functional coverage analysis.


• Excellent debugging and problem-solving skills.


• Strong communication and collaboration skills.



Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.


• 3+ years of experience in FPGA verification.


• Experience with scripting languages (e.g., Python, Perl).


• Familiarity with hardware description languages (e.g., VHDL, Verilog).




Thanks,


Nilesh Kumar
Talent Acquisition
Tanisha Systems Inc

Desk:


Email:

[redacted email]

Address:

99 Wood Ave South, Suite # 308, Iselin, NJ 08830




About the Company

T

Tanisha Systems