ASIC Digital Design, Sr Manager

Synopsys Inc

Sunnyvale, CA

JOB DETAILS
SKILLS
ASIC Design, Architectural Design, Architectural Services, Artificial Intelligence (AI), Automation, Career Development, Clock Design, Coaching, Code Reviews, Coding Standards, Communication Skills, Continuous Improvement, Cross-Functional, DFT (Design for Test), Debugging Skills, Design Services, Electrical Engineering, Establish Priorities, Graphic Design, IP (Internet Protocol), Low Power, Mentoring, PCI Express (PCI-E), People Management, Performance Management, Perl Programming Language, Python Programming/Scripting Language, Quality Assurance Methodology, Quality Management, RTL Design, Requirements Management, Scripting (Scripting Languages), Tcl-Tk, Team Lead/Manager, Technical Leadership, Technical/Engineering Design, USB, Validation Testing
LOCATION
Sunnyvale, CA
POSTED
30+ days ago

You Are:

You are an experienced ASIC Digital Design Manager with strong hands-on expertise in USB digital design and architecture, capable of leading a team while remaining deeply engaged in technical execution. You bring extensive experience defining and implementing RTL and micro-architecture for complex, high-speed interface IP, combined with proven team-lead and people-management skills.

You setting technical direction with your team, making architectural trade-offs, and driving design decisions . You are comfortable working directly with RTL, reviewing detailed design implementations, and guiding engineers through complex debug and convergence challenges. Your background includes exposure to USB or similar protocols.

As a experienced leader, you foster a culture of accountability, collaboration, and technical excellence. You mentor engineers through hands-on guidance and design reviews, communicate clearly across disciplines, and work closely with cross-functional teams to deliver high-quality, silicon-proven USB IP .

What Youll Be Doing:

Leading and managing a team of ASIC digital design engineers, providing day-to-day technical guidance, mentoring, and performance management.

Owning USB digital architecture and RTL design execution, remaining hands-on while leading design efforts at block, subsystem, and IP-integration levels.

Defining micro-architecture, design specifications, and implementation approaches for high-performance, power-efficient, and scalable PCIe designs.

Leading end-to-end digital design activities, including architecture definition, RTL development, debug, design convergence, and post-silicon support.

Planning and prioritizing design work, balancing hands-on technical involvement with team execution, schedules, and resource needs.

Driving design quality through rigorous design reviews, coding standards, and RTL maintainability practices.

Collaborating closely with verification, validation teams to ensure smooth IP integration and silicon success.

Coaching and developing engineers through hands-on technical mentoring, design feedback, and career development discussions.

Promoting a culture of technical ownership, accountability, and continuous improvement within the team.

Identifying opportunities to improve AI- driven design methodologies, workflows, and productivity, while keeping focus on design execution.

Communicating design status, technical risks, and trade-offs effectively to senior management and cross-functional stakeholders.

The Impact You Will Have:

Deliver industry-leading USB digital IP with high performance, robustness, and scalability.

Drive strong architectural and design execution for USB IP used by leading customers.

Improve design quality, predictability, and execution efficiency through strong technical leadership.

Build and lead a highly capable ASIC digital design team with deep USB expertise.

Strengthen Synopsys position as a leader in high-speed interface IP across commercial, enterprise, and automotive markets.

What Youll Need:

Bachelors degree in Electrical Engineering (BSEE) with 12+ years of experience, or Masters degree (MSEE) with 10+ years.

Demonstrated experience as a team lead or people manager in an ASIC digital design environment.

Extensive hands-on ASIC RTL design experience, with direct ownership of complex digital designs.

Deep expertise in USB digital design and architecture or similar protocols.

Strong understanding of ASIC design fundamentals including clocking, resets, low-power techniques, and design for test.

Experience with AI-driven tools, flows and methodologies. Familiarity with scripting languages (Perl, TCL, Python) for design automation is a plus.

About the Company

S

Synopsys Inc

Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.

Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.
COMPANY SIZE
500 to 999 employees
INDUSTRY
Computer/IT Services
FOUNDED
1986
WEBSITE
https://www.synopsys.com/