ASIC Design Verification Engineer at Chelsea Search Group Minneapolis, MN

ASIC Design Verification Engineer job at Chelsea Search Group. Minneapolis, MN.Digital ASIC Design Verification EngineerMinneapolis, MN (onsite)US CitizenFull-Time + Health Benefits + 401K Plan with profit sharing + PTO + Stock Option PlanDuties and ResponsibilitiesReviewing and editing target specifications as required for completeness and feasibilityDeveloping architectures and specifications for complex design blocks and SOCsImplementing complex digital designs using reusable RTL methods (Verilog, VHDL, SystemVerilog)Complex computational architectures and algorithms, such as multi-rate/DSP and µP designModern verification methods, including directed/constrained-random stimuli, assertions, TLM and UVMCollaborative creation of comprehensive verification plans and coverage metricsMulti-supply-domain and UPF methodsConstraining and synthesizing digital designs to target cell librariesStatic timing, power, and SI analyses of complex digital designsSupporting place & route efforts, including P/G and floorplanning, timing and physical constraints, gated CTS, MCMM setups, back-annotation, timing closure, equivalence checkingPlanning, implementing, and analyzing designs for DFT, test hooks, and scan/ATPG/JTAG/BIST, and supporting production test with ATE patterns (ATPG and functional) and timeset definitionsProficiency with Synopsys EDA, including DC-Topo, VCS-MX, PrimeTime, Formality, TetraMAXProficiency with Mentor EDA, including Questa, ADMS, TessentModern revision-control tools and best-practices in a collaborative, multi-site design communityProficiency with UNIX/Linux including shell scripting, text utilities (e.g. sed, awk, grep), using Modules, high-level programming such as C/C++, PERL/Python/TCL scriptingProficiency with Windows apps, including Word, Excel, PowerPoint, Visio, Project, PDF conversionRequirementsBSEE/MSEE or BSCS/MSCS or equivalent7+ years of direct industry experience with ASIC and/or SoC designA strong background in RTL based digital IC design using Verilog/SystemVerilogProven track record of first-pass successesSelf-starter with the ability to assume leadership rolesAbility to work well in a diverse team environmentWillingness to mentor junior engineersExperience with industry standard development tools and methodologies#J-18808-Ljbffr