10 years of experience in High-Speed Analog Mixed-Signal layouts Full-custom layout verification & RC extraction experience. Top-level floorplan powerplan & integration experience is a must.
Work on layouts of blocks and modules by taking care of all design constraints of matching, reduce parasitic effects, shielding, etc.
Proficient in physical verification flow & debug like DRC, LVS, ERC, etc.
Hands-on expertise with industry standard EDA tools - • Cadence Virtuoso • LXL • GXL • Cadence PVS • Mentor Graphics Calibre
Experience in technology nodes - TSMC 22nm & 12nm
Experience with EMIR analysis, ESD antenna and related layout solutions
Automation experience is a plus