Duties:
Conduct transistor level integrated circuits analog design of CIS chip. Apply transistor level integrated circuits analog IP requirements and architecture principles to study module circuit specifications. Analyze, compare, and select analog circuit design architectures. Complete layout design, conduct full-chip simulation verification, and perform layout problem analysis and positioning. Conduct simulation module, and optimize circuit design. Ensure effective integration of digital-analog hybrid circuits.
Job Requirements:
• Master's in Electronics Engineering or Electrical Engineering. • Two years' experience. • Must be able to perform job tasks, including having knowledge of transistor level integrated circuits.
Office Address: 4633 Old Ironsides Dr. Ste 330 Santa Clara, CA 95054