Design Verification Engineer
US Tech Solutions, Inc.
Santa Clara, CA
JOB DETAILS
SALARY
$70–$85 Per Hour
JOB TYPE
Temporary, Contractor, Full-time
SKILLS
ASIC Design, ASIC Verification, C Programming Language, C++ Programming Language, Code Coverage, Communication Skills, Computer Engineering, Computer Firmware, DFT (Design for Test), Debugging Skills, Design Verification, Electrical Engineering, Financial Control, Functional Testing, Graphic Design, Hardware Architecture, IP (Internet Protocol), Intrusion Prevention Systems, Memory Hardware, Microprocessor Architecture, PHY, Perl Programming Language, Process Improvement, Python Programming/Scripting Language, Quality Assurance Methodology, Root Cause Analysis, Scripting (Scripting Languages), Simulation, SystemVerilog, Tcl-Tk, Team Player, Technical Leadership, Technical Support, Technical/Engineering Design, Test Plan/Schedule, Testing, Verification Engineering, Verilog Hardware Description Language
LOCATION
Santa Clara, CA
POSTED
24 days ago
Top Must Have Skills:
- Solid minimum 8 + years Design Verification Experience
- Verification Experience with DDR5 Controller /PHY
- System Verilog /UVM - Language Skills
THE ROLE:
We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve client's abilities to deliver the highest quality, industry-leading technologies to market. Be a part of a team that delivers Industry leading IP and help our experts in RTL, FW, circuit, and architecture teams develop leading edge and differentiating IPs.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Develop/Maintain tests for functional verification.
- Build the directed and random verification tests, debug test failures to determine the root cause, work with RTL and firmware engineers to resolve design defects and correct any test issues.
- Work on functional & code coverage verification.
- Provide technical support to other teams
PREFERRED EXPERIENCE:
- Experience with C/C++
- Experience with Verilog, System Verilog, and modern verification libraries like UVM
- 10+years of ASIC design verification experience
- Experience / Background with DDR or Memory Controller. PHY Verification is a plus
- Experience with scripting languages like Python, Perl and TCL is a plus.
- Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
- Understanding of Design for Test methodologies and DFT verification experience is a plus
- Proficient in debugging firmware and RTL code using simulation tools
ACADEMIC CREDENTIALS:
- Bachelor’s or master’s degree in computer engineering/Electrical Engineering
About US Tech Solutions:
US Tech Solutions is a global staff augmentation firm providing a wide range of talent on-demand and total workforce solutions. To know more about US Tech Solutions, please visit www.ustechsolutions.com.
US Tech Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
About the Company
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