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ASIC Design Engineer

P. Chappel Associates, Inc. Santa Clara Full-Time
$150,000.00 - $190,000.00 / year
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Front-End ASIC Design Engineer - Santa Clara, CA



Unique opportunity to join an established international company in their US expansion. Working from the US headquarters, you will have the ability to be an impact player working with other exceptionally talented people. The Front-End ASIC Design Engineer will be a key person in this growing design department. Great opportunity to work on current, ongoing and upcoming new projects.



Primary responsibilities include:


  • ·         Support customer’s design through all phases of ASIC execution.

  • ·         Ensure designs meets product performance requirements by performing related tasks. Contribute to microarchitecture, RTL design, synthesis, and timing closure.

  • ·         Ensure deadline for project milestones are met.

  • ·         Work effectively with internal teams, including verification team and physical design team. (Note: Socionext has teams located globally).

  • ·         Display a results-focused attitude and accomplish Company/Team-goals.


Required/Desired Qualifications:


·         Bachelor’s Degree in EE or similar degree.


·         3-8 years of professional design experience.


·         Hands-on ASIC front-end design, ideally in design services environments (product backgrounds acceptable).


·         Skills Required – Micro-architecture at module/sub-system/chip-level; digital design of complex modules/sub-systems, with solid understanding of clock-domain crossings; integration of IPs/modules/sub-systems designed by internal/external teams; experience using AMBA bus protocols; System Verilog experience; Lint and CDC analysis; timing analysis; excellent debug skills; customer support.


·         Teamwork, dedication, collaborative, strong communications and interpersonal skills.


·         Ability to meet stringent deadlines and project timelines.


·         Skills Desired - Experience in at least few of these: CPU (preferably, ARM), or GPU, or DSP; low-power design and verification; peripheral interfaces such as CSI, I3C, USB, PCIe; FPGA


·         Experience dealing with international teams in a small company environment is desired.


Recommended skills

Digital Signal Processing
Field Programmable Gate Array
Logic Synthesis
Static Timing Analysis
Register Transfer Level
System Verilog
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