FPGA Design Engineer Manager (active clearance required) with Security Clearance

About us One team. Global challenges. Infinite opportunities. At Viasat, we're on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We're looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team. What you'll do We are looking for a FPGA Design Engineer Manager who is eager to collaborate to and lead a small, fast-paced team! We participate in the design, documentation, implementation, prototyping, and testing of FPGA features on groundbreaking high speed or ultra-low power digital circuit boards for encrypted communications systems including Layer 2 and Layer 3 In-line Network Encryptors, and embedded cryptographic devices. We interface and collaborate with other FPGA designers as well as system, hardware, software, and test engineers as new capabilities are developed and transitioned into service. In this role, you will lead all phases of a product from market definition through production and release After a design is fielded, you will provide support to production and product support as needed. You will select, mentor, and evaluate members of the team. The day-to-day * Design FPGA module and system level architectures with Verilog and/or VHDL
* Develop simulations for modules and systems
* Synthesizes Verilog and/or VHDL to FPGA products
* Develop timing constraints, analyze timing results, and implement design changes required to close timing
* Generate and collaborate on required design documents, development requirements, specifications and verification protocols
* Develop, test and support embedded firmware for current and future products
* Work closely with hardware and hardware engineers, bringing up boards, interpreting data sheets and schematics
* Conduct code and design reviews and participate in multi-functional reviews
* Maintain and control FPGA code revision history
* Responsible for owning and driving technical issues to resolution
* Select members of team. Mentor and coach junior engineers.
* Integrates and debugs design in the laboratory What you'll need * Bachelor's Degree in Electrical Engineering, Computer Engineering or a related field
* 5+ years FPGA design experience * Foundational knowledge of digital logic and timing considerations
* Strong written and verbal communication skills, ability to work with a temporally and geographically distributed team
* Attention to detail, ability to follow process and coding guidelines, participate in code reviews and accept feedback
* Experience with Programmable Logic EDA tools, such as AMD/Xilinx ISE/Vivado, Intel/Altera Quartus, Siemens/Mentor Graphics, Synopsys Synplify, SoftCore Micro embedments in MicroChip, etc.
* Proven track record to design and implement FPGA modules using Verilog and/or VHDL with simulation and testbench development
* Understanding of embedded processor software and peripheral interfacing to PL/HW
* Champion requirements allocation and integration into design and implementation
* Familiarity with designing and coding for re-use, maintainability and a scalability
* Desire to a member of a team, collaborating on large system designs
* Work independently, take initiative, and take ownership of tasks and results
* US citizenship required
* Active United States Secret Security Clearance
* Experience working in dynamic multi-discipline integration for overall product success
* Ability to work out of our office in: Carlsbad, CA, Linthicum Heights, MD, Marlborough, MA, or Tampa, FL
* Ability to travel up to 10% What will help you on the job * Master's Degree in Electrical Engineering or Computer Engineering
* Experience with common ASIC design and verification tools from Cadence, Synopsys, or Mentor Graphics
* Familiarity with TCL, Perl, Python or another scripting language
* Experience with high speed interfaces like SERDES, DDR2/3/4, LVDS
* Proven experience in debugging, diagnosing, and solving embedded designs issues
* System Verilog design verification techniques, UVM, or other advanced verification methodologies
* Experience in product architecture, system level considerations, size-power-performance-price trade-offs
* Experience and familiarity with Linux-based development environments
#LI-BBS Salary range $134,500.00 - $192,000.00 / annually.For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $153,500.00- $207,500.00/ annually At Viasat, we consider many factors when it comes to compensation, including the scope of the position as well as your background and experience. Base pay may vary depending on job-related knowledge, skills, and experience. Additional cash or stock incentives may be provided as part of the compensation package, in addition to a range of medical, financial, and/or other benefits, dependent on the position offered. Learn more about Viasat's comprehensive benefit offerings that are focused on your holistic health and wellness at EEO Statement Viasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic. If you would like to request an accommodation on the basis of disability for completing this on-line application, please click here.