In this role you will be a key member of a team participating in the design of a future generation Intel microprocessor.
Responsibilities for this position will include but not be limited to:
Perform all aspects of the design flow from RTL to gate level netlist through synthesis, place, clock tree synthesis and route.
Proficiency in timing and power convergence and physical design closure to create a design database ready for manufacturing.
Block-level floor planning including placement of macros and ports for optimal connectivity.
Critical path analysis and identification of logic structures requiring custom design and layout for timing optimization.
Static timing analysis and identifying fixes in build for signoff convergence.
Validation of physical design including timing, electrical rules, DRC/LVS, Noise, electro migration checks.
Formal equivalence verification.
Scripting to automate tasks and improve debug efficiency.
The ideal candidate will also exhibit behavioral traits that indicate:
Works well in a team and is productive under aggressive schedules
Willingness to debug tools and flows for predictable convergence
Keen and enthusiastic learner
Written and verbal communication skills
Excellent organizational skills
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Inside this Business Group
You must have a Bachelors Degree in Computer or Electrical Engineering with 3+ years of experience OR Masters degree in Computer or Electrical Engineering and 3+ years of experience in the following:
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: [ Link removed ] - Click here to apply to SoC Design Engineer
ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
- Critical Path Method